Basically because of the economical constraints and performance requirements the memory hierarchy is an important concept. The more you expect fast memory the more rupees have to be wasted. For instance, for similar production technology, DRAM chips have 16 times more competence than SRAM chips, but a cycle time that is 8 to 16 times slower. Capability and access time both increase yet again in secondary storage.
Placing the memory hierarchy makes to think us on the access time and it becomes the most needing matter in designing the memory hierarchy. Because access time is also connected with physical distance. Laws of physics (the speed of light) are used here, faster components are placed closer the processor; this technique is done with the intension about access time depends on the Gap of the memory component from the processor. The result is the conventional Memory hierarchy with respectively, comprising registers, cache level 1, cache level 2, main memory, and virtual memory.
Non-Uniform Memory Access architecture is a different aspect. The success of the NUMA architecture depends seriously on the principle of position of location which says that programs tend to use again data and instructions that they have most in recent times used. In a model situation, this principle means that the data and instructions necessary for the processor are in the small quantity of fast memory (cache) that the architect places nearby the processor. Therefore, a computer in which nearly all memory has slow memory costs can run at fast memory speeds.
